module set_parameter_logic #
(
    parameter               WIDTH = 128
)
(
    input   wire                csi_clk,
    input   wire                rsi_reset_n,

    /*port*/
    input   wire [WIDTH-1:00]   parameter_in,

    output  wire [WIDTH-1:00]   parameter_out
);

assign                  parameter_out = parameter_in;

endmodule
